Mardus-Kreutz Unipolar Micro-stepper. 4th Part.

The Unipolar Power Stage

The power stage receives Sync pulses from the translator as well as the following signals: Phase_A, Phase_A\, Phase_B, Phase_B\, Vref_Channel A, Vref_Channel B and regulates the current flowing on the stepper motor's coils. Channel A and B are identical, so we are going to describe only one of them.

Power Stage Channels.

Each channel drives the coils corresponding to one phase of the Stepper motor and includes the Dual Mosfet Driver, Power Mosfets, Chopper circuit and the reference adjustment circuit for the respective phase.

The reference Adjusting circuit.

The reference analog waveform comes from the translator, half of the low pass filter is physically located on the power stage board and its function is to attenuate noise introduced on the ribbon cable, delivering an analog signal to the chopper's comparator comprising unattenuated frequencies from zero to about 1.5Khz and attenuated at about 12 dB/octave over 1.5 Khz. Potentiometers R18 and R19 set the peak coil current that is going to be regulated by the chopper stage.

1/10 Micro-step Reference Waveforms

The chopper Stages.

Our unipolar stepper drive's current regulation circuit is based on a fixed frequency chopper with "blanking time".

Each channel's chopper stage is basically integrated by a SET dominant S-R latch, a dual Mosfet driver and a voltage comparator.

The result of the comparison between the actual coil current and the reference voltage resets the S-R latch when the actual current produces a voltage on the sense resistor whose value exceeds the reference voltage. The resetted latch inhibits the Mosfet driver which turns-off the conducting Mosfet, the coil current begins to decay until the next Sync signal triggers the Set input of the latch in the next cycle. The coil current Decay Mode is called "Fast Decay" mode and is the only mode available on unipolar stepper drives.

Reference (blue) versus Current Sense Resistor voltage (yellow).

Upon receiving the sync signal the Latch changes state forcing the proper Mosfet in the sequence to turn-on, the SET dominance characteristic of the latch makes the Set signal to force the output into conduction even if a reset signal is received from the comparator, so while the SYNC signal is LOW the proper Mosfet is kept turned ON, that is what is called "Blanking time".

Blanking time versus Switching transients.

The objective of the introduction of a "Blanking time" is to overcome the problem presented with switching transient currents as soon as a power Mosfet is Turned-ON. Those transient currents create short duration peak voltages (from 0.5 to 2 micro-seconds) on the Low side sense resistors, whose values exceed the reference voltage and otherwise would affect the normal function of the current regulator circuit by prematurely switching Off the Mosfets.

Part of the chopper stage is the Mosfet Driver. The dual Mosfet driver chips employed in our circuit have an external inhibit input (one per individual Mosfet driver) which is driven by the corresponding latch output.

The logic Step sequence.

A-B phase switching sequence.

The input signals to the Mosfet drivers come from the translator, they are: Phase_A, Phase_A\, Phase_B, and Phase_B\. Each signal is activated following a pre-defined switching sequence, stored in the firmware, depending on the direction of rotation of the motor. Phase A, and Phase A\ are never activated at the same time, the same applies to the other two signals respectively.

Reference vs Phase Switching Channel A

The logic sequence depends only on the rotational direction and always correspond with the Two phases ON Full Step driving mode. The actual reference waveform (on each channel) is the only factor that changes with the micro-step mode.

Reference vs Phase Switching channel B

The Mosfet Drivers

The Mosfet driver chips are the Texas Instruments UCC27424D (SMD components), as we already know, a special characteristic (Inhibit inputs) of this particular chip is used in our design as a means to avoid having to include extra logic gates to disable the outputs. This component is a really critical component on our design.

The gate driving voltage is the 9 Volts coming from the 7809 linear regulator. We use "Logic Gate" power Mosfets (IRL640), the maximum gate voltage is limited to 10 Volts, hence the use of the 9 Volts regulator. The 4 amp Mosfet driving current capability of the driver chips makes the switching times short, so switching losses are kept to the minimum. The gate resistors are calculated in order to control dV/dt to less than 3 Volts/nanosecond.